Hardware Architectures for Accelerating Machine Learning

Start date: 24 September 2021

Duration: 1 hour, 12:00 pm to 1:00 pm

Location: Online webinar

Certificate: N/A

Cost: Free, limited # participants per company

Course code: N/A

Programme overview

Computational aspects and engineering challenges of accelerating Machine Learning

Learning outcomes

Attendees will finish with a good understanding of deep learning algorithms and their scope and applicability, popular architecture choices for acceleration and algorithmic optimization techniques, in particular quantization, and how to take neural networks from frameworks to hardware.

Who is the course for?

Professionals with computer architecture and general programming knowledge who are interested in developing expertise in deep learning and data scientists who would like to develop better understanding of the hardware implications.


– General machine learning paradigms
– Basic understanding of algorithmic requirements in regard to compute and memory for deep learning
– Popular optimization schemes for Convolutional Neural Networks (CNNs) in particular pruning and reduced precision
o How to train for these optimizations
– Architectural choices and their pros and cons
– End-to-end tool flow with FINN: an example framework that allows customization of CNNs and hardware architectures for CNNs, with a fast prototyping flow on FPGAs.

Trainer Profile

Michaela Blott : Fellow @ Xilinx Research.

Email Gerry.Byrne@midasireland.ie for bookings and queries

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