ARM Architecture Fundamentals

Start date: 01 June 2021

Duration: 2 days x 6 hours/day: 1 - 2 June: 9am - 3pm each day

Location: Online course

Certificate: N/A

Cost: Members € 300; Non-members € 450

Course code: N/A

Programme overview

If you missed this course in June 2021, please note that MIDAS Skillnet courses are rerun if there is sufficient demand. If you click on the "Enquire Now" tab on the image above to request a place on a future re-run, you can increase the likelihood of this course being held again.
This Arm fundamentals course introduces the architecture and programmer’s model of Arm processors. The architectures covered are the Cortex-A and Cortex-R for high performance applications and real-time applications. Both the 32bit and 64bit execution states will be detailed during the presentation.
It will be delivered as an interactive remote learning course with a maximum of 12 participants to maintain high quality training.

Learning outcomes

Being able to understand the architectural differences that exist between real-time and application processor profiles in the Arm CPU family.
Being able to decide on the most appropriate execution state 32/64bit choice for application development.

Who is the course for?

This class is designed to give a well-rounded view of the capabilities of both application and real-time processors from the Arm family. It is aimed at individuals in need to understand the capabilities of Arm based System on Chip and considerations when deciding on a 32bit or 64bit firmware development.


Session 1 (6 hours):
• Arm AArch32 Architecture Overview
• Cortex-A17 / A15 / A7 Overview
• Memory Management
• Caches and Branch Prediction

Session 2 (6 Hours):
• TrustZone
• NEON Overview
• Arm AArch64 Architecture Overview
• Software Engineer’s Guide to the Cortex®-A72, Cortex®-A57, Cortex®-A53 and Cortex®-A35 MPCore

Appendix (Based on the time available)
• Software Engineer’s Guide to Cortex-R8

Trainer Profile

Dr. David Cabanis  has a long career in the Semi-conductor industry. He started his career working at IBM in the hard-disks controllers design team. He then went into chip-design and verification consulting at Cadence Design Systems. For the Last 11 years Dr Cabanis has been providing training in system level modelling, Arm software development and System on Chip integrations for Doulos’ customers. Dr Cabanis is an accredited Arm trainer, he also has both Arm’s AAE and AAME accreditations. 

Email for bookings and queries

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